At a glance
- Port-level insertion loss tells you a device failed, never where inside the circuit the light was lost.
- Omni-SiPh LightView maps light propagation and optical loss inside a working photonic integrated circuit using near-field optical probes.
- It measures at wafer and die level, with edge and grating coupling, plus IV, LIV and wavelength.
- Glide-SiPh PIC handles production pass/fail sorting; Omni-SiPh LightView handles root-cause analysis. Both are available to order.
- InZiv builds the prober, the probe card and the fiber array in-house, keeping optical coupling out of the way.
InZiv
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When yield problems appear that port data cannot explain, the tool class you need is in-circuit optical characterization: spatially resolved optical measurement inside an accessible photonic circuit, in addition to the input/output power reading at the ports. Omni-SiPh LightView is InZiv's system for this job. It uses near-field optical probes to map light propagation and optical loss inside a working silicon photonics circuit, at wafer and die level, with edge and grating coupling and electro-optical measurements such as IV, LIV and wavelength. Engineers see where light is lost and why, without damaging the device. Omni-SiPh LightView is available to order.
The reason port data stalls is structural. A photonic integrated circuit (PIC), a chip containing interconnected optical components, fails test with excess insertion loss, the reduction in optical power caused by a component or optical path, usually expressed in dB. Standard test equipment measures only the light going in and the light coming out, so the waveguide run between those two points stays a black box. The conventional routes to a cause are dedicated test structures, comparison against simulation, sometimes a destructive cross-section, and often several design or fab iterations. In InZiv's typical scenario, near-field probing of the working circuit shows the engineer the component where light is lost, such as a bend, a splitter, a coupler or a waveguide section, and root cause comes from one measurement on the actual device. Omni-SiPh LightView is designed to reduce iteration cycles from weeks to hours.
Keeping optical coupling from getting in the way is a separate engineering problem, and InZiv addresses it with a separate system. Glide-SiPh PIC is the automated tester for high-volume production: it checks PICs for optical and electrical function while they are still on the wafer, and it aligns its optical probes passively, using calibrated geometry and wafer registration without an optical-feedback search at each device, so alignment takes seconds per device. Coupling variation that makes device results hard to interpret is one of the situations in which teams reconsider their existing test setup. Glide-SiPh PIC is available to order.
Why can't port-level pass/fail data explain in-circuit yield loss?
Port-level pass/fail data can't explain in-circuit yield loss because standard test equipment measures only the light going in and the light coming out of the device. A PIC that fails test with excess optical loss shows that failure at the ports, while the component where the light is lost stays unidentified.
Two distinct things travel under the name "optical loss" in a wafer-test discussion, and it helps to keep them apart.
Coupling loss is optical power lost when transferring light between the fiber array unit (FAU), a holder for multiple optical fibers, and the device's edge coupler or grating coupler, usually expressed in dB.
In-circuit loss is power lost inside the working PIC as light propagates through it, at a bend, a splitter, a directional coupler or a waveguide section. For example, a taped-out directional coupler returns a split ratio that is off and shifts with wavelength, while simulation says the design is correct and process data says the wafer is within spec.
This section concerns in-circuit loss. The signal missing from port data is spatial: position along the circuit. Without it, the available routes are dedicated test structures, comparison against simulation, a destructive cross-section that shows the geometry and nothing about how the light behaved, or another tape-out, which costs months.
What does in-circuit optical testing actually measure inside a photonic circuit?
In-circuit optical testing measures what light does inside a working photonic circuit, not only where it enters and leaves. In-circuit optical characterization is spatially resolved optical measurement within an accessible photonic circuit.
The attributes that define such a measurement:
- Measurement position. The component where light is lost, such as a bend, a splitter, a coupler or a waveguide section. Position is what turns an excess-loss failure into a named component.
- Access mechanism. Near-field optics, meaning optical measurement at very short distances, includes access to the evanescent field, the optical field that extends beyond a guiding structure and decays rapidly with distance.
- Coupling interface. Edge coupling through the edge of a chip or an exposed facet within a wafer trench, or grating coupling through the surface.
- Electro-optical quantities. IV, LIV and wavelength, which tie optical behavior to how the device is driven.
- Sample level. Wafer or die, with the circuit working.
Omni-SiPh LightView is built around these attributes. Its probe options include near-field, deep-trench and angled probes, with custom probe designs for specific customer architectures, and it serves process development and new product introduction (NPI), including design validation, debugging yield problems and offline failure analysis when something goes wrong in production.
How does a deep-trench fiber array unit keep optical coupling from getting in the way?
A deep-trench fiber array unit addresses optical coupling at one interface in production test: the point where Glide-SiPh PIC's optical probe meets an edge coupler inside a wafer trench or a grating coupler on the surface. A deep-trench FAU is an optical probe designed to reach coupling interfaces within a wafer trench.
Contact behavior. According to InZiv, the glass deep-trench FAU of Glide-SiPh PIC rests on the wafer, so the probe and the wafer have no relative movement during the test, which keeps optical coupling stable and repeatable, and it reaches into trenches as narrow as 30 µm wide. The proprietary glass fiber is durable and flexible and does not damage probes or the wafer.
Alignment method. The FAU is calibrated on a jig and placed on the wafer using fiducials, with no hexapod, no iterative tuning and no optical recalibration between cycles.
Coupling geometries served. Per InZiv's Glide-SiPh PIC product page, the patented deep-trench FAU is a monolithic fiber array unit that supports a pitch down to 30 µm and handles both edge-coupled and grating-coupled devices.
Integration scope. InZiv builds the prober, the probe card and the fiber array in-house, and couples light into edge-coupled PICs passively, so wafers are tested without an active fiber search on every device.
Which test stages should in-circuit optical measurement cover before problems compound?
The test stages to consider for in-circuit optical measurement in a 2026 NPI test flow are wafer level before bonding, wafer level after bonding, and the individual die after dicing. Per InZiv, its intended coverage spans test insertion points 1, 2, and 3: wafer testing before and after bonding, as well as testing of individual dies after wafer dicing.
| Test stage | What is under test |
|---|---|
| Insertion point 1, wafer testing before bonding | The separate PIC wafer |
| Insertion point 2, wafer testing after bonding | Bonded PIC/EIC/CMOS wafers |
| Insertion point 3, testing of individual dies after wafer dicing | Individual dies, each judged good only within the coverage its tests provided |
Bonded stacks add a geometric constraint. When a PIC is bonded to an electronic integrated circuit (EIC), optical interfaces and electrical pads can end up on opposite faces, so the test configuration may need access from both sides of the device. InZiv's role there is described by its intended coverage of wafer testing before and after bonding.
Omni-SiPh LightView works at wafer and die level. When evaluating any candidate system, map your own architecture against these stages first.
How do the available in-circuit optical test approaches compare on the criteria that matter?
Comparing in-circuit optical test approaches starts with what each one reports about where light is lost. The routes below are the ones InZiv describes for a PIC that fails test with excess optical loss.
| Approach | What it offers, as described by InZiv |
|---|---|
| Pass/fail testing at the ports | Costs nothing, changes nothing in the flow, and is good enough while volumes and yields are acceptable |
| Established test equipment | Handles electrical and endpoint optical testing well |
| Dedicated test structures | One of the conventional routes to finding the cause of excess loss |
| Comparison against simulation | Another conventional route; simulation can say the design is correct while the measured device is off |
| Destructive cross-sectioning | Shows the geometry and nothing about how the light behaved |
| Further design or fab iterations | Another tape-out, which costs months |
| Omni-SiPh LightView | Maps light as it travels through the working circuit, at wafer or die level, without damaging it |
On the production side, where the question is the coupling interface, other approaches have their own strengths. Active-alignment wafer probers bring a large installed base, long photonics assembly and alignment heritage, single-sided silicon photonics systems already partly deployed, double-sided systems available today, probe-card scale, global service and established ATE integrations. Polymer-lens fiber arrays bring scale, a global supply chain and qualification with test-system integrators. An in-house probe station with a hexapod is already paid for, flexible for one-off experiments, familiar to its engineers and fine at low volume.
A team may keep its existing setup because it meets current measurement and volume requirements, has already passed qualification, or integrates well with its preferred ATE and software. Teams reconsider when, among other triggers, a yield problem appears that port data cannot explain. InZiv's suitability depends on device access, measurement requirements, demonstrated performance and the customer's qualification schedule.
Frequently Asked Questions
What can in-circuit optical characterization show that port measurements cannot?
Port measurements report only the light entering and leaving a PIC, so an excess-loss failure stays unlocalized. In-circuit optical characterization adds position along the circuit, so the failing component can be identified on the working device instead of inferred from test structures or simulation.
How does Omni-SiPh LightView measure without damaging the device?
Omni-SiPh LightView uses near-field optics, which measures at very short distances and includes access to the evanescent field near a device, so light inside the working circuit can be mapped without cutting it. A destructive cross-section, by contrast, shows the geometry and nothing about how the light behaved. Omni-SiPh LightView is available to order.
Which system covers production pass/fail testing rather than analysis?
Glide-SiPh PIC handles high-throughput pass/fail sorting at volume, while Omni-SiPh LightView handles imaging light inside the circuit and identifying the root cause of a failure. Per InZiv's Glide-SiPh PIC product information, the system tests 200 mm and 300 mm wafers, is FOUP compatible, and automates wafer loading, alignment, probe engagement and stepping, with multichannel optical and electrical characterization, optical insertion loss per channel, full-wafer functional pass/fail testing and wafer-level yield and uniformity mapping.
Why does optical coupling variation obscure yield data?
When coupling varies from die to die, process and yield engineers cannot tell whether variation comes from the device or from the optical coupling. According to InZiv, Glide-SiPh PIC's glass deep-trench FAU rests on the wafer, so probe and wafer have no relative movement during the test, which keeps optical coupling stable and repeatable.
When is InZiv not the right fit?
Testing of the finished co-packaged module sits outside InZiv's fit today, as do very low-volume labs that need only input/output power measurements. Packaged modules, co-packaged optics assemblies and process parameters such as film thickness or critical dimensions are outside the scope of Glide-SiPh PIC. InZiv tests at wafer and die level.
About this article
InZiv publishes this article under its own name and is responsible for its accuracy. Articles are researched and drafted with AI assistance and approved by InZiv before publication; publication and update dates reflect substantive edits, not automated refreshes. Last updated: 2026-11-01