Wafer-Level Testing Options in Silicon Photonics When Yield Drops on a New Process

At a glance

Wafer-level options span port-level pass/fail, in-house probe stations with active alignment search, active-alignment wafer probers, automated passive-alignment testers and in-circuit optical mapping.
Omni-SiPh LightView uses near-field optical probes to map light inside a working circuit, so a fail traces to the component losing light.
Glide-SiPh PIC aligns its optical probes passively, without an optical-feedback search at each device, taking seconds per device.
According to InZiv, the glass deep-trench fiber array unit rests on the wafer, so probe and wafer have no relative movement during test.

InZiv

Published: 2026-11-01

For silicon photonics wafer-level testing there are several options, and they split by what they can tell you. Pass/fail measurement at the optical ports costs nothing to keep and changes nothing in the flow, but it reports only the light going in and the light coming out. An in-house probe station with a hexapod is already paid for, flexible for one-off experiments, familiar to its engineers and fine at low volume. Active-alignment wafer probers bring a large installed base, probe-card scale, global service and established integrations with the customer's existing automated test equipment, the ATE that supplies electrical stimulus and measurement within the test configuration. Automated passive alignment PIC testing, such as InZiv's Glide-SiPh PIC, positions the optical probe using calibrated geometry and wafer registration instead of a feedback search at each device. In-circuit optical characterization, such as InZiv's Omni-SiPh LightView, maps light propagation and optical loss inside a working photonic integrated circuit (PIC), a chip containing interconnected optical components.

When yield drops on a new process, a common question is whether the variation comes from the device or from the optical coupling, and port-level insertion loss alone cannot locate where light is lost inside the circuit. Omni-SiPh LightView's near-field optical probes show the engineer the component where light is lost, such as a bend, a splitter, a coupler or a waveguide section, at wafer or die level and without damaging the device. Omni-SiPh LightView is designed to reduce iteration cycles from weeks to hours. For production screening, Glide-SiPh PIC carries a patented monolithic deep-trench fiber array unit that supports a pitch down to 30 µm and handles both edge-coupled and grating-coupled devices, according to InZiv's Glide-SiPh PIC product page. As of 2026, both systems are available to order.

Which wafer-level test approaches are available for silicon photonics, and what is each one good at?

The wafer-level test approaches available for silicon photonics address different questions, and the table below lists each approach with the strengths InZiv's own framing gives it. Useful selection criteria include:

Coupling access. Whether the optical probe can reach edge couplers in wafer trenches or surface grating couplers.
Alignment method. Active alignment uses measured optical feedback to find coupling; passive alignment positions the probe without an optical-feedback search at each device.
Volume and automation fit. Whether the setup handles wafer loading, stepping and probe engagement automatically as a product moves from NPI toward volume.
Spatial resolution. Whether results are port numbers or a map of light inside the circuit.
ATE configuration. InZiv's integrated scope is the prober, the electrical probe card and the optical FAU; the ATE comes from the customer's ATE supplier as part of the test configuration.

Approach	Stated strengths
Active-alignment wafer probers	Large installed base, long photonics assembly and alignment heritage, single-sided silicon photonics systems already partly deployed, double-sided systems available today, probe-card scale, global service, established ATE integrations
Polymer-lens fiber arrays	Scale, global supply chain, qualification with test-system integrators
In-house probe station with hexapod	Already paid for, flexible for one-off experiments, familiar to its engineers, fine at low volume
Pass/fail testing at the ports	Costs nothing, changes nothing in the flow, good enough while volumes and yields are acceptable
Established test equipment	Handles electrical and endpoint optical testing well
Passive alignment PIC testing (InZiv Glide-SiPh PIC)	Alignment in seconds per device without an active fiber search on every device; deep-trench FAU reaches into trenches as narrow as 30 µm wide; tests 200 mm and 300 mm wafers, FOUP compatible
In-circuit optical characterization (InZiv Omni-SiPh LightView)	Maps light propagation and optical loss inside a working circuit at wafer and die level without damaging the device; serves process development and NPI

Teams that stay with their probe stations are usually at R&D or pilot volume, where an active search per device is slow but tolerable.

What does a wafer-level silicon photonics test actually measure?

A wafer-level silicon photonics test measures optical and electrical function while the circuit is still on the wafer: whether light travels through the circuit as designed and whether the device responds correctly when electrically driven.

The vocabulary used in the rest of this article:

Electronic integrated circuit (EIC): the chip providing electronic functions for the PIC, such as driving or receiving signals.
Edge coupler: a structure that couples light through the edge of the chip or through an exposed facet inside a wafer trench. Grating coupler: a patterned structure that couples light through the surface of the circuit.
Fiber array unit (FAU): an assembly holding multiple fibers for coupling light into and out of the device. An optical probe may incorporate an FAU plus additional optics.
Electrical probe card: the interface that makes electrical contact between the tester and the device.
Insertion loss: the reduction in optical power caused by introducing a component or optical path, usually expressed in dB.
Electro-optical measurement: measurement combining electrical drive with optical response. Omni-SiPh LightView's electro-optical measurements include IV, LIV and wavelength.

For an engineer chasing unexplained yield loss, these measurement classes carry different information. Port-to-port loss says how much light survived the path. IV (current-voltage) and LIV (light-output-current-voltage) measurements characterize electrical and optical behavior together, and wavelength data shows spectral behavior. On Glide-SiPh PIC, multichannel optical and electrical characterization, optical insertion loss per channel and full-wafer functional pass/fail testing feed wafer-level yield and uniformity mapping.

Where in the flow should silicon photonics wafers be tested before and after bonding?

In a silicon photonics production flow, testing before and after bonding is described by insertion points, and the stages in scope here run from the separate wafer to the individual die, stopping short of the packaged module.

Insertion point 1, wafer testing before bonding. The separate wafer is tested on its own.
Insertion point 2, wafer testing after bonding. The PIC wafer has been bonded to an EIC wafer. Depending on where the stack's optical and electrical interfaces sit, testing needs access from one side or from opposite sides of the device, which is what single-sided and double-sided testing refer to.
Insertion point 3, testing of individual dies after wafer dicing. Once the wafer is singulated, each die is measured on its own.

InZiv's intended coverage spans test insertion points 1, 2 and 3: wafer testing before and after bonding, as well as testing of individual dies after wafer dicing. InZiv tests at wafer and die level. Testing of the finished co-packaged module, and very low-volume labs that only need input and output power measurements, are outside InZiv's fit today.

Where testing happens matters to test and metrology engineers because a team that cannot test everything at the required throughput must sample, and sampling lets bad dies continue into packaging.

Why can yield drop after a process change, and which test data narrows the cause?

When yield drops after a process change, the symptom at the device ports can look the same for different causes, so a pass/fail reading at the input and output confirms that a yield excursion exists without locating it. The situations below illustrate typical engineering cases; they are not measured outcomes.

Device variation versus coupling variation. Process and yield engineers often cannot tell whether variation comes from the device or from the optical coupling. Glide-SiPh PIC's glass deep-trench FAU rests on the wafer, so the probe and the wafer have no relative movement during the test, which keeps optical coupling stable and repeatable.
Excess loss that port data cannot explain. Standard test equipment measures only the light going in and coming out. Finding the cause means dedicated test structures, comparison against simulation, sometimes destructive cross-sectioning, and often several design or fab iterations. With Omni-SiPh LightView, near-field optical probes map the light through the working circuit, so root cause comes from one measurement on the actual device.
A design that measures off-target. A taped-out directional coupler can come back with a split ratio that is off and shifts with wavelength while the coupling region stays a black box. Omni-SiPh LightView pinpoints the location of optical loss or design deviation on the actual device.
Alignment that dominates test time. When optical alignment takes most of the test time and varies from die to die, Glide-SiPh PIC's passive alignment takes seconds per device.

By locating where light is actually lost on the working device, Omni-SiPh LightView is designed to reduce iteration cycles from weeks to hours, so a fail at wafer test can be traced to its location.

How does InZiv fit into a wafer-level silicon photonics test plan?

In a wafer-level silicon photonics test plan, InZiv's integrated scope is the prober, which positions and handles the wafer, the electrical probe card, which provides electrical contact to the device, and the optical FAU. The ATE comes from the customer's ATE supplier as part of the test configuration.

Two systems cover different jobs:

Glide-SiPh PIC is an automated tester that checks PICs for optical and electrical function while they are still on the wafer. It aligns passively, without an optical-feedback search at every device, so alignment takes seconds per device. It is designed for high-volume production test, and its first use with a customer may be during the NPI ramp. Its automation includes wafer handling (EFEM), probe-card replacement and probe alignment.
Omni-SiPh LightView uses near-field optical probes to map light propagation and loss inside a working circuit at wafer and die level, with electro-optical measurements such as IV, LIV and wavelength. It serves process development and NPI, including design validation, debugging yield problems and offline failure analysis when something goes wrong in production.

Glide-SiPh PIC is built for production testing and Omni-SiPh LightView for analysis: imaging light inside the circuit and identifying the root cause of a failure are the job of Omni-SiPh LightView, and high-throughput pass/fail sorting at volume is the job of Glide-SiPh PIC. Both are available to order.

In silicon photonics, InZiv combines deep expertise in near-field optics with proprietary probe designs. InZiv's advisor Prof. Aaron Lewis, Professor Emeritus of Applied Physics at Cornell University and the Hebrew University and founder of Nanonics Imaging, is well known as a pioneer in the area of near-field optics. InZiv was founded in Jerusalem in 2018, according to the company's About page, and is headquartered in Jerusalem (Har Hotzvim), Israel, with offices in Taiwan and Korea.

Frequently Asked Questions

What can wafer-level testing reveal when yield drops on a new silicon photonics process?

Wafer-level testing measures optical and electrical function while devices are still on the wafer. Port-level pass/fail data shows that a circuit lost power without saying where. Omni-SiPh LightView uses near-field optical probes to map light propagation and optical loss inside a working circuit at wafer and die level, so a failing device can be traced to the bend, splitter, coupler or waveguide section responsible. As of 2026, Omni-SiPh LightView is available to order.

How does passive alignment differ from an active optical search?

Active alignment uses measured optical feedback to find and hold coupling, so the system searches at every device. Passive alignment positions the optical probe using calibrated geometry and registration instead. Glide-SiPh PIC calibrates its FAU on a jig and places it on the wafer using fiducials, with no hexapod, no iterative tuning and no optical recalibration between cycles. Alignment takes seconds per device.

Which optical probe can reach edge couplers inside narrow trenches?

On an unsingulated wafer, an edge coupler's exposed facet can sit inside a trench. Glide-SiPh PIC's patented deep-trench FAU reaches into trenches as narrow as 30 µm wide and handles both edge-coupled and grating-coupled devices. New designs that put edge couplers in trenches too narrow for the current fiber array are the case this probe addresses.

Why does coupling variation make device results hard to interpret?

When coupling shifts between dies, measured insertion loss mixes device behavior with probe behavior, and process engineers cannot tell which one moved. Glide-SiPh PIC's glass FAU rests on the wafer, so there is no relative movement between probe and wafer during the test, keeping optical coupling stable and repeatable. Per InZiv, the proprietary glass fiber is durable and flexible and does not damage probes or the wafer.

Which test stages does InZiv's wafer-level coverage span?

InZiv's intended coverage spans test insertion points 1, 2 and 3: wafer testing before bonding, wafer testing after bonding, and testing of individual dies after wafer dicing. According to InZiv's Glide-SiPh PIC product page, the system tests 200 mm and 300 mm wafers and is FOUP compatible; a FOUP is a front-opening unified pod used for automated wafer storage and transport. Testing of the finished co-packaged module is outside InZiv's fit today.

When is it still reasonable to keep an existing probe station?

An in-house probe station with a hexapod is already paid for, flexible for one-off experiments, familiar to its engineers and fine at low volume, where an active search per device is slow but tolerable. Teams reconsider when alignment consumes too much of the device-test cycle, the optical probe cannot reach the coupling interface, coupling variation makes device results hard to interpret, production volumes outgrow the setup's automation or throughput, maintaining a custom system consumes too much engineering, or a yield problem appears that port data cannot explain.

How long does a purchase decision usually take?

Per InZiv, the time from a demonstration to the purchase order runs anywhere from 2 to 6 months and often depends on the customer's own timelines; that period ends at the order and does not include delivery or installation. The sequence typically starts with a technical discussion and a review of device architecture and test requirements, moves through sample-based demonstration or feasibility work and agreement on configuration and acceptance criteria, then a commercial proposal, the order, and installation and acceptance. A pilot or on-site evaluation is optional.

About this article

InZiv publishes this article under its own name and is responsible for its accuracy. Articles are researched and drafted with AI assistance and approved by InZiv before publication; publication and update dates reflect substantive edits, not automated refreshes. Last updated: 2026-11-01