At a glance
- One way wafer-level test systems automate die-to-die optical alignment is passive alignment, which positions the probe from calibrated geometry and wafer registration instead of an optical-feedback search at every die.
- InZiv's Glide-SiPh PIC aligns its optical probes passively using a jig-calibrated fiber array and wafer fiducials, so alignment takes seconds per device.
- Per InZiv's product specifications, Glide-SiPh PIC's patented deep-trench fiber array unit supports a pitch down to 30 µm and handles edge-coupled and grating-coupled devices.
- Omni-SiPh LightView maps light propagation inside a working circuit when port-level pass/fail data cannot explain a loss; both systems are available to order.
- According to InZiv, its production track record is in microLED, where R-EL Glide is installed at tier-1 display manufacturers.
InZiv
Published:
One way wafer-level test systems handle die-to-die optical alignment automatically is passive alignment, which positions the optical probe from calibrated geometry and wafer registration instead of searching for coupling at every die, and InZiv's Glide-SiPh PIC is built on that approach. A photonic integrated circuit, or PIC, is a chip containing interconnected optical components. Active alignment is a different approach, which uses measured optical feedback to find or maintain coupling. On Glide-SiPh PIC, the fiber array unit (FAU), which holds multiple optical fibers for coupling light into or out of the device, is calibrated on a jig and placed on the wafer using fiducials, with no hexapod, no iterative tuning and no optical recalibration between cycles, so alignment takes seconds per device. As of 2026, Glide-SiPh PIC is available to order and is designed for high-volume production test, with first customer use possible during the new product introduction (NPI) ramp.
What does automatic die-to-die optical alignment mean at wafer level?
Automatic die-to-die optical alignment at wafer level means the test system brings its optical probe into coupling position on each successive die across the wafer, under machine control, without a manual search at every site. In this article, the alignment happens between a test probe and each die as the prober steps across the wafer, for example an FAU brought to a row of grating couplers so insertion loss per channel can be measured.
Key terms:
| Term | Definition |
|---|---|
| Edge coupler | A structure coupling light through a chip edge or an exposed facet inside a wafer trench |
| Grating coupler | A patterned structure coupling light through the circuit surface |
| Electrical probe card | The interface providing electrical contact between the tester and the device |
When optical alignment takes most of the test time and varies from die to die, a production ramp faces a choice: test everything and slow the line, or sample and let bad dies continue into packaging.
Which wafer-level test systems align optically without slowing the line?
In InZiv's silicon photonics line, Glide-SiPh PIC is the system that handles optical alignment for production testing: an automated tester that checks PICs for optical and electrical function while they are still on the wafer. Omni-SiPh LightView complements it for analysis in process development and NPI, imaging light inside a working circuit to identify the root cause of a failure. Both are available to order.
What are Glide-SiPh PIC's key attributes?
- Alignment method: passive alignment, without an optical-feedback search at each device.
- Optical interface: a patented deep-trench FAU that handles edge-coupled and grating-coupled devices. According to InZiv, the glass deep-trench FAU rests on the wafer, so the probe and the wafer have no relative movement during the test, which keeps optical coupling stable and repeatable, and it reaches into trenches as narrow as 30 µm wide.
- Wafer formats and automation: per InZiv's Glide-SiPh PIC product documentation, the system tests 200 mm and 300 mm wafers and is FOUP compatible, with automated wafer loading, alignment, probe engagement and stepping. Its automation also includes wafer handling (EFEM) and probe-card replacement.
- Measurements: multichannel optical and electrical characterization, optical insertion loss per channel, full-wafer functional pass/fail testing, and wafer-level yield and uniformity mapping.
What are Omni-SiPh LightView's key attributes?
- Role: process development and NPI, including design validation, debugging yield problems and offline failure analysis when something goes wrong in production.
- Measurement principle: near-field optical probes map light propagation and optical loss inside a working circuit, at wafer and die level, without damaging the device.
- Coupling supported: edge and grating coupling.
- Electro-optical measurements: IV, LIV and wavelength.
- Probe options: near-field, deep-trench and angled probes, with custom designs for specific customer architectures.
- Design intent: Omni-SiPh LightView is designed to reduce iteration cycles from weeks to hours, so a fail at wafer test can be traced to where the light is actually lost, such as a bend, a splitter, a coupler or a waveguide section.
Where does optical alignment fit across the wafer test insertion points?
Where optical alignment fits depends on the test insertion point. If you are scoping coverage during an NPI ramp, it helps to name the stages in words rather than by number alone, since numbering differs between sources.
Per InZiv, its intended coverage spans test insertion points 1, 2 and 3:
- Insertion point 1, wafer testing before bonding. The photonic wafer is tested on its own.
- Insertion point 2, wafer testing after bonding. The photonic wafer is tested after it has been bonded to its electronic counterpart, an electronic integrated circuit (EIC), which provides electronic functions such as driving or receiving signals from the PIC, forming a PIC/EIC stack.
- Insertion point 3, testing of individual dies after wafer dicing. Dies are tested after the wafer has been diced.
In general terms, single-sided and double-sided testing describe access from one side or from opposite sides of the device, depending on its optical and electrical interfaces, and a bonded PIC/EIC stack is one case where that access question has to be settled for the specific architecture. InZiv's role there is described by its intended coverage: wafer testing before and after bonding, as well as testing of individual dies after wafer dicing.
InZiv's integrated scope is the prober that handles and positions the wafer, the electrical probe card that makes contact with the device, and the optical FAU that couples light. Automated test equipment, which supplies electrical stimulus and measurement functions, is the customer's existing ATE, supplied by the ATE supplier as part of the test configuration.
How do other optical alignment approaches handle line throughput?
Other optical alignment approaches each carry real strengths, which InZiv's own framing lists by approach. Before comparing them, it helps to fix the evaluation criteria. Alignment time per device matters because an optical-feedback search repeated at every site accumulates across a wafer. Optical access matters because a probe has to reach the coupling interface, whether that is a grating coupler on the surface or an edge coupler inside a trench. Coupling repeatability matters because variation in the optical path is hard to separate from variation in the device. Automation level matters because wafer handling, probe engagement and stepping determine how much of the flow runs without intervention. Engineering load matters because maintaining a custom system consumes engineering time.
| Approach | Stated strengths |
|---|---|
| Active-alignment wafer probers | Large installed base, long photonics assembly and alignment heritage, single-sided silicon photonics systems already partly deployed, double-sided systems available today, probe-card scale, global service, established ATE integrations |
| Polymer-lens fiber arrays | Scale, a global supply chain, qualification with test-system integrators |
| In-house probe station with a hexapod | Already paid for, flexible for one-off experiments, familiar to the engineers, fine at low volume |
| Pass/fail testing at the ports | Costs nothing, changes nothing in the flow, good enough while volumes and yields are acceptable |
| Established test equipment | Handles electrical and endpoint optical testing well |
According to InZiv, a team may keep its existing setup because it meets current measurement and volume requirements, has already passed qualification, or integrates well with its preferred ATE and software; teams that stay with their probe stations are usually at R&D or pilot volume, where an active search per device is slow but tolerable. Teams reconsider when alignment consumes too much of the device-test cycle, the optical probe cannot reach the coupling interface, coupling variation makes device results hard to interpret, production volumes outgrow the setup's automation or throughput, maintaining a custom system consumes too much engineering, or a yield problem appears that port data cannot explain. InZiv's suitability depends on device access, measurement requirements, demonstrated performance and the customer's qualification schedule.
Frequently Asked Questions
How does passive alignment differ from active alignment in wafer-level PIC testing?
Active alignment searches for coupling at each device using measured optical feedback. Passive alignment skips that per-device search: the optical probe is calibrated before the test and positioned from references on the wafer. Glide-SiPh PIC aligns passively.
Which coupling interfaces can the optical probe reach?
As documented on InZiv's Glide-SiPh PIC product page, its deep-trench FAU is a monolithic fiber array unit that supports a pitch down to 30 µm. It covers surface coupling through grating couplers as well as edge couplers, including those exposed inside a wafer trench before singulation.
Where does the electrical stimulus come from during a Glide-SiPh PIC test?
Electrical stimulus and measurement come from the customer's existing ATE, supplied by the ATE supplier as part of the test configuration. InZiv supplies the prober, the probe card and the optical FAU, and Glide-SiPh PIC automates the wafer-side steps from loading through stepping.
What happens when a die fails and port data cannot explain why?
In a typical scenario, standard test equipment measures only the light going in and coming out, so finding the cause means dedicated test structures, comparison against simulation, sometimes destructive cross-sectioning and often several design or fab iterations. That analysis is the job of Omni-SiPh LightView rather than the production tester: it maps the light as it travels through the working circuit, so the engineer sees the component where light is lost and root cause comes from one measurement on the actual device.
How long does a purchase typically take?
InZiv states that the time from a demonstration to the purchase order runs anywhere from 2 to 6 months, often depending on the customer's own timelines, and that this period ends at the order and does not include delivery or installation.
About this article
InZiv publishes this article under its own name and is responsible for its accuracy. Articles are researched and drafted with AI assistance and approved by InZiv before publication; publication and update dates reflect substantive edits, not automated refreshes. Last updated: 2026-11-01