At a glance
- Full-wafer silicon photonics testing hinges on optical coupling: how the probe reaches each device, and how long alignment takes per die.
- Options range from port-level pass/fail with existing ATE, to in-house probe stations, active-alignment probers, and passive-alignment systems.
- Glide-SiPh PIC aligns optical probes passively using calibrated geometry and wafer fiducials, taking seconds per device, and is available to order.
- Per InZiv, intended coverage spans insertion points 1 to 3: wafer test before bonding, after bonding, and individual dies after dicing.
- Omni-SiPh LightView uses near-field optical probes to show where light is lost inside a working circuit, without damaging it.
InZiv
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Replacing sample-die testing with 100% wafer testing for silicon photonics comes down to how light is coupled into each device and how much of the per-device test cycle that coupling consumes. When optical alignment takes most of the test time and varies from die to die, a team must either test everything and slow the line, or sample and let bad dies continue into packaging. The options are approaches to optical probing: pass/fail testing at the ports, an in-house probe station with a hexapod, active-alignment wafer probers, polymer-lens fiber arrays, and passive alignment. InZiv's Glide-SiPh PIC is an automated tester that checks photonic integrated circuits (PICs) for optical and electrical function while they are still on the wafer, and it aligns passively: its fiber array unit (FAU) is calibrated on a jig and placed on the wafer using fiducials, without an optical-feedback search at each device, so alignment takes seconds per device. Glide-SiPh PIC is designed for high-volume production test, and Omni-SiPh LightView is built for analysis. In silicon photonics, as of 2026, both are available to order.
What does 100% wafer testing of silicon photonics actually mean?
100% wafer testing of silicon photonics means every die on the wafer is measured, while sample-die testing measures a subset and infers the condition of the rest. This section is scoped to wafer-level optical probing and die-level measurement before packaging, so the vocabulary below describes what an all-die test has to do at each site.
The attributes that define the test
- PIC (photonic integrated circuit): a chip containing interconnected optical components.
- EIC (electronic integrated circuit): the chip that provides electronic functions such as driving or receiving signals from a PIC.
- Bonded PIC/EIC stack: the photonic and electronic wafers joined together, which can call for test access from one side or from opposite sides, depending on the device's optical and electrical interfaces.
- FAU (fiber array unit): a unit holding multiple optical fibers for coupling light into or out of a device.
- Optical coupling and alignment: positioning the optical probe against an edge coupler or a grating coupler so light transfers with acceptable coupling loss.
- Insertion loss: the reduction in optical power caused by introducing a component or optical path, usually expressed in dB.
- Insertion point: the test stage in the manufacturing flow, such as wafer testing before bonding or wafer testing after bonding.
- Per-die data: a measured record for each die, as opposed to an estimate drawn from sampled sites.
To reach all-die coverage, the same actions repeat at every device: light goes in and comes out, electrical contact is made, and the optical interface is aligned at the next site.
Why does testing only sample dies leave yield risk unresolved?
Testing only sample dies characterizes the sites that were measured, and every unmeasured die carries forward an unverified status. Sampling means probing a selected subset of locations on the wafer and inferring the rest, so a fault at an unmeasured site is not seen at wafer test.
The trade-off shows up differently by role:
- Photonics test and metrology engineers: the existing test approach cannot meet the throughput or repeatability a production ramp needs, because optical alignment takes most of the test time and varies from die to die. The choice becomes testing everything and slowing the line, or sampling and letting bad dies continue into packaging.
- Process and yield engineers: they cannot tell whether variation comes from the device or from the optical coupling, and a yield problem can appear that port data cannot explain.
- PIC and photonics design engineers: a taped-out device, such as a directional coupler, can come back with a measured split ratio that is off and shifts with wavelength, while the coupling region stays a black box.
- Engineering and manufacturing leadership: optical test becomes the bottleneck as a product moves toward volume, and a new device architecture, a production ramp or a qualification deadline can force a decision.
Which test insertion points does InZiv's intended coverage span?
InZiv's intended coverage spans test insertion points 1, 2, and 3: i.e. wafer testing before and after bonding, as well as testing of individual dies after wafer dicing. Each stage is named in words next to its number below, because numbering differs between sources.
| Insertion point and stage | What is under test |
|---|---|
| Insertion point 1, wafer testing before bonding | Separate wafers |
| Insertion point 2, wafer testing after bonding | Bonded PIC/EIC wafers |
| Insertion point 3, testing of individual dies after wafer dicing | Individual dies after dicing |
In a bonded PIC/EIC stack, the optical and electrical interfaces determine whether testing needs access from one side of the device (single-sided testing) or from opposite sides (double-sided testing). InZiv's role at these stages is described by its intended coverage: wafer testing before and after bonding, followed by testing of individual dies.
Per InZiv, testing of the finished co-packaged module, and very low-volume labs that only need input and output power measurements, are outside InZiv's fit today.
Which approaches to full-wafer optical probing exist, and what are their strengths?
The approaches to full-wafer optical probing below each have strengths that InZiv itself lists. They can be weighed against the situations in which, per InZiv, teams reconsider a setup: alignment consumes too much of the device-test cycle, the optical probe cannot reach the coupling interface, coupling variation makes device results hard to interpret, production volumes outgrow the setup's automation or throughput, maintaining a custom system consumes too much engineering, or a yield problem appears that port data cannot explain.
| Approach | Stated strengths |
|---|---|
| Active-alignment wafer probers, which use measured optical feedback to find or maintain coupling | Large installed base, long photonics assembly and alignment heritage, single-sided silicon photonics systems already partly deployed, double-sided systems available today, probe-card scale, global service and established ATE integrations |
| Polymer-lens fiber arrays | Scale, a global supply chain and qualification with test-system integrators |
| In-house probe station with a hexapod | Already paid for, flexible for one-off experiments, familiar to its engineers and fine at low volume |
| Pass/fail testing at the ports | Costs nothing, changes nothing in the flow and is good enough while volumes and yields are acceptable |
Whichever probing approach a team uses, the customer's existing automated test equipment (ATE), which supplies electrical stimulus and measurement functions, comes from the ATE supplier as part of the test configuration.
How does InZiv enable measurement of every die on a silicon photonics wafer?
InZiv enables measurement of every die on a silicon photonics wafer with Glide-SiPh PIC, which couples light passively so wafers are tested without an active fiber search on every device, and supports the analysis of fails with Omni-SiPh LightView. The scope is wafer-level and die-level electro-optical test.
Glide-SiPh PIC, for production test. It aligns its optical probes using calibrated geometry and wafer registration, so the system does not need to search for alignment at every device. Its patented deep-trench FAU, a monolithic fiber array unit, handles both edge-coupled and grating-coupled devices. The glass deep-trench FAU rests on the wafer, so the probe and the wafer have no relative movement during the test, which keeps optical coupling stable and repeatable. Per InZiv's Glide-SiPh PIC product page, the system tests 200 mm and 300 mm wafers, is FOUP compatible, and performs full-wafer functional pass/fail testing with wafer-level yield and uniformity mapping. Its first use with a customer may be during the NPI ramp, the move from new product introduction into qualified production.
Omni-SiPh LightView, for analysis. Imaging light inside the circuit and identifying the root cause of a failure are the job of Omni-SiPh LightView, while high-throughput pass/fail sorting at volume is the job of Glide-SiPh PIC. Omni-SiPh LightView serves process development and NPI, including design validation, debugging yield problems and offline failure analysis.
InZiv builds the prober, the probe card and the fiber array in-house. Glide-SiPh PIC and Omni-SiPh LightView are available to order. InZiv was founded in Jerusalem in 2018 and is headquartered in Jerusalem (Har Hotzvim), Israel, with offices in Taiwan and Korea. Its advisor Prof. Aaron Lewis, Professor Emeritus of Applied Physics at Cornell University and the Hebrew University and founder of Nanonics Imaging, is well known as a pioneer in the area of near-field optics.
Frequently Asked Questions
These answers address 100% wafer testing of silicon photonics devices, meaning functional optical and electrical measurement of every die on the wafer instead of a sampled subset.
What does testing every die on the wafer require that sampling does not?
Testing every die means wafer handling, optical coupling, electrical contact and stepping repeat at every site, with a result recorded per device. Per InZiv's Glide-SiPh PIC product page, the system tests 200 mm and 300 mm wafers and is FOUP compatible, a front-opening unified pod being a protective carrier for automated wafer storage and transport, with automated wafer loading, alignment, probe engagement and stepping, multichannel optical and electrical characterization, optical insertion loss per channel, full-wafer functional pass/fail testing, and wafer-level yield and uniformity mapping. Automation in Glide-SiPh PIC also covers wafer handling through an EFEM, probe-card replacement and probe alignment.
How does passive alignment differ from active alignment?
Active alignment uses measured optical feedback to find or maintain coupling. Passive alignment positions the optical probe using calibrated geometry and registration, without an optical-feedback search at each device. In Glide-SiPh PIC, the FAU is calibrated on a jig and placed on the wafer using fiducials, with no hexapod, no iterative tuning and no optical recalibration between cycles.
What if the edge couplers sit inside narrow trenches?
An edge coupler couples light through the edge of a photonic chip or through an exposed facet within a wafer trench, and new designs can put edge couplers in trenches too narrow for the current fiber array. Per InZiv's Glide-SiPh PIC product page, its patented deep-trench FAU supports a pitch down to 30 µm. According to InZiv, the glass deep-trench FAU rests on the wafer, so the probe and the wafer have no relative movement during the test, and it reaches into trenches as narrow as 30 µm wide. Its proprietary glass fiber is durable and flexible and does not damage probes or the wafer.
Why do teams stay with an in-house probe station and hexapod?
A team may keep its existing setup because it meets current measurement and volume requirements, has already passed qualification, or integrates well with its preferred ATE and software. A team at R&D or pilot volume may stay with its probe station, since an active search per device is slow but tolerable there. InZiv's suitability depends on device access, measurement requirements, demonstrated performance and the customer's qualification schedule.
What happens when a wafer-test fail cannot be explained by port data?
Standard test equipment measures only the light going in and coming out. Finding the cause of excess optical loss then means dedicated test structures, comparison against simulation, sometimes destructive cross-sectioning, and often several design or fab iterations. Omni-SiPh LightView uses near-field optical probes, meaning optical measurement at very short distances including access to the evanescent field, to map light propagation and optical loss inside a working silicon photonics circuit at wafer and die level, with edge and grating coupling and electro-optical measurements such as IV, LIV and wavelength. By pinpointing the component where light is lost, such as a bend, a splitter, a coupler or a waveguide section, without damaging the device, Omni-SiPh LightView is designed to reduce iteration cycles from weeks to hours.
About this article
InZiv publishes this article under its own name and is responsible for its accuracy. Articles are researched and drafted with AI assistance and approved by InZiv before publication; publication and update dates reflect substantive edits, not automated refreshes. Last updated: 2026-11-01