At a glance
- Scaling optical wafer test hinges on how optical probes align: an optical-feedback search at every device dominates test time at volume.
- Glide-SiPh PIC aligns its optical probes passively using calibrated geometry and wafer registration, taking seconds per device, and is available to order.
- Per InZiv, Glide-SiPh PIC's glass deep-trench FAU rests on the wafer, so probe and wafer stay fixed, keeping optical coupling stable and repeatable.
- Omni-SiPh LightView maps light propagation and optical loss inside a working circuit with near-field optical probes, at wafer and die level.
- InZiv builds the prober, the probe card and the fiber array in-house, and is available to order for silicon photonics testing.
InZiv
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If your current optical wafer test setup cannot keep up with a new volume ramp, check how much of the device-test cycle goes to alignment: when a probe station performs an optical-feedback search at every device, alignment can take most of the test time and vary from die to die. For a fabless design house in that situation, one option is to replace the per-device search with passive alignment, meaning optical positioning by calibrated geometry and wafer registration, without an optical-feedback search at each device. Glide-SiPh PIC, InZiv's automated tester for photonic integrated circuits (PICs) on the wafer, works this way: its fiber array unit (FAU), which holds multiple fibers for coupling light into or out of the device, is calibrated on a jig and placed on the wafer using fiducials, with no hexapod, no iterative tuning and no optical recalibration between cycles, so alignment takes seconds per device. It is designed for high-volume production test, its first use with a customer may be during the new product introduction (NPI) ramp, and it is available to order.
Throughput is one part of the problem. When a taped-out device such as a directional coupler returns with a split ratio that is off and shifts with wavelength, input and output measurements cannot say where inside the circuit the light went. Omni-SiPh LightView, InZiv's analysis system, uses near-field optical probes, which measure optical fields at very short distances from a structure, to map light propagation and optical loss inside a working silicon photonics circuit at wafer and die level, without damaging the device. Its electro-optical measurements include IV, LIV and wavelength, and it is designed to reduce iteration cycles from weeks to hours. It is available to order. The sections below cover the parts of a test cell, test insertion points, alignment, the available approaches, and what wafer-level data can tell you.
What does scaling up optical wafer test for silicon photonics actually involve?
Scaling up optical wafer test for silicon photonics means replacing a bench measurement made one device at a time with an automated cell that couples light into every PIC on the wafer, drives it electrically, and records a result. The scope here is measurement of the circuit while it is still at wafer or die level, before packaging.
The parts of such a cell:
- Prober (probe station). Positions and handles the wafer or die for test and steps between sites. Attributes that matter: the wafer sizes it handles, and whether loading is automated.
- Electrical probe card. The interface that makes electrical contact between the tester and the device under test (DUT).
- Optical probe / FAU. Key attributes: fiber pitch, and whether it serves edge couplers (structures that couple light through the chip edge or an exposed facet within a wafer trench), grating couplers (patterned structures that couple light through the surface), or both.
- Alignment method. Active alignment uses measured optical feedback to find or maintain coupling. Passive alignment, defined above, replaces that search.
- Automated test equipment (ATE). The customer's existing ATE, from the ATE supplier, supplies electrical stimulus and measurement as part of the test configuration. InZiv's integrated scope is the prober, the probe card and the optical FAU.
- Wafer logistics. Front-opening unified pod (FOUP) carriers and an equipment front-end module (EFEM) move wafers without manual handling.
- Test insertion points. The stages of the flow at which the wafer or die is tested, covered in the next section.
According to InZiv's Glide-SiPh PIC product page, the system tests 200 mm and 300 mm wafers and is FOUP compatible. Its automation includes wafer handling (EFEM), probe-card replacement and probe alignment.
Where should optical test insertions sit in a fabless production flow?
In a fabless production flow, optical test insertions sit at defined stages of the wafer flow. Each stage is named in words next to its insertion-point number below, because numbering differs between sources.
| Stage | General definition |
|---|---|
| Insertion point 1: wafer testing before bonding | Testing of the PIC wafer on its own, before it is bonded to an electronic wafer |
| Insertion point 2: wafer testing after bonding | Testing of bonded PIC and electronic integrated circuit (EIC) wafers. Depending on the device, optical and electrical interfaces can sit on opposite sides, which calls for double-sided testing, meaning access from opposite sides of the device |
| Insertion point 3: individual dies after wafer dicing | Testing of singulated dies. A known-good die is one that has passed specified tests, within the coverage and limits of those tests |
According to InZiv, its intended coverage spans test insertion points 1, 2 and 3: wafer testing before and after bonding, as well as testing of individual dies after wafer dicing. Testing of the finished co-packaged module, and very low-volume labs that only need input/output power measurements, are outside InZiv's fit today.
InZiv's two silicon photonics systems have different jobs. Glide-SiPh PIC is built for production testing and high-throughput pass/fail sorting at volume. Omni-SiPh LightView is built for analysis in process development and NPI: design validation, debugging yield problems, and offline failure analysis when something goes wrong in production.
Why does optical alignment time decide throughput at volume?
Optical alignment time decides throughput at volume when it is spent per device rather than per wafer. Active alignment, which uses measured optical feedback to find coupling, runs a search at each device before measurement begins, so the alignment share of the test cycle grows with the number of devices tested. When alignment takes most of the test time and varies from die to die, a team has two choices: test everything and slow the line, or sample and let bad dies continue into packaging.
Passive alignment removes the per-device search. On Glide-SiPh PIC, the jig-calibrated FAU is placed using wafer fiducials, and InZiv states that alignment takes seconds per device.
| Action to take | What to check |
|---|---|
| Replace the per-device optical search with passive placement | Measure how much of the device-test cycle the current setup spends on alignment |
| Keep the probe stable relative to the wafer during the measurement | Glide-SiPh PIC's glass deep-trench FAU rests on the wafer, so the probe and the wafer have no relative movement during the test, which keeps optical coupling stable and repeatable |
| Automate loading, stepping and probe engagement | Glide-SiPh PIC automates wafer loading, alignment, probe engagement and stepping. Configuration and acceptance criteria are agreed during the purchase process, and the customer's existing ATE stays part of the test configuration |
| Decide between testing every die and sampling | Sampling lets bad dies continue into packaging, and the alignment time per device decides how practical it is to test every die |
| Confirm access to edge couplers in narrow trenches | New designs can put edge couplers in trenches too narrow for the current fiber array. InZiv's suitability depends on device access, so check the trench width against the device architecture |
Which optical wafer test approaches do teams weigh when volume rises?
Comparing optical wafer test approaches when volume rises is only useful once the evaluation criteria are fixed. The criteria below follow the situations in which, according to InZiv, teams reconsider an existing setup:
- Alignment time per device. Relevant when alignment consumes too much of the device-test cycle.
- Access to the coupling interface. Relevant when the optical probe cannot reach the coupling interface, for example an edge coupler in a narrow trench.
- Coupling repeatability. Relevant when coupling variation makes device results hard to interpret.
- Automation and throughput. Relevant when production volumes outgrow the setup's automation or throughput.
- Engineering burden. Relevant when maintaining a custom system consumes too much engineering.
- Root-cause visibility. Relevant when a yield problem appears that port data cannot explain.
A team may also keep its existing setup because it meets current measurement and volume requirements, has already passed qualification, or integrates well with its preferred ATE and software.
| Approach | Strengths listed for it |
|---|---|
| Active-alignment wafer probers | Large installed base, long photonics assembly and alignment heritage, single-sided silicon photonics systems already partly deployed, double-sided systems available today, probe-card scale, global service, established ATE integrations |
| Polymer-lens fiber arrays | Scale, a global supply chain, qualification with test-system integrators |
| In-house probe station with a hexapod | Already paid for, flexible for one-off experiments, familiar to its engineers, fine at low volume |
| Pass/fail testing at the ports | Costs nothing, changes nothing in the flow, good enough while volumes and yields are acceptable |
| Established test equipment | Handles electrical and endpoint optical testing well |
| Glide-SiPh PIC passive alignment | No active fiber search on every device; available to order |
According to InZiv's Glide-SiPh PIC product page, its patented deep-trench FAU, a monolithic fiber array unit, supports a pitch down to 30 µm and handles both edge-coupled and grating-coupled devices, which bears on the access criterion. Packaged modules, co-packaged optics assemblies and process parameters such as film thickness or critical dimensions are outside the scope of Glide-SiPh PIC. When the open question is where light is lost rather than whether a die passes, that is the job of Omni-SiPh LightView.
What does wafer-level electro-optical data tell you that port-level pass/fail does not?
Wafer-level electro-optical data describes how each die behaves under light and current, while port-level pass/fail returns a result with no location attached. Two kinds of wafer-level work feed different parts of a design-and-debug loop: functional screening of every die in production, and in-circuit characterization of where light is lost.
- Optical insertion loss per channel. Insertion loss is the reduction in optical power caused by introducing a component or optical path, usually expressed in dB. Glide-SiPh PIC measures it per channel as part of its multichannel optical and electrical characterization.
- Functional pass/fail with yield and uniformity mapping. Glide-SiPh PIC performs full-wafer functional pass/fail testing and wafer-level yield and uniformity mapping.
- Electro-optical measurements. On Omni-SiPh LightView, electro-optical measurements include IV and LIV (current-voltage and light-output-current-voltage) and wavelength.
- Coupling type covered. Edge-coupled, grating-coupled, or both. This has to match the device's coupling interface.
- Spatial loss location. Near-field optics works close enough to a device to access the evanescent field just beyond a guiding structure. Omni-SiPh LightView uses it to show the component where light is lost, such as a bend, a splitter, a coupler or a waveguide section.
Process and yield engineers may not be able to tell whether variation comes from the device or from the optical coupling, and a yield problem can appear that port data cannot explain. In the typical scenario InZiv describes, finding the cause of excess optical loss otherwise takes dedicated test structures, comparison against simulation, sometimes destructive cross-sectioning, and often several design or fab iterations. With Omni-SiPh LightView, root cause comes from one measurement on the actual device.
Frequently Asked Questions
What is passive alignment, and why does it matter for throughput?
Passive alignment is the method Glide-SiPh PIC uses to position its FAU without searching for coupling at each device. Because active alignment runs its search per device, its share of the test cycle grows with every device tested. For a fabless design house moving from pilot builds to volume, removing that search takes alignment out of the per-device part of the test cycle.
Which InZiv system handles production sorting, and which handles root cause?
Glide-SiPh PIC is built for production testing and Omni-SiPh LightView for analysis. High-throughput pass/fail sorting at volume is the job of Glide-SiPh PIC, which tests 200 mm and 300 mm wafers and is FOUP compatible. Imaging light inside the circuit and identifying the root cause of a failure are the job of Omni-SiPh LightView. Its probe options include near-field, deep-trench and angled probes, with custom probe designs for specific customer architectures. Both are available to order.
How does InZiv reach edge couplers in narrow trenches?
According to InZiv's product information, Glide-SiPh PIC's patented deep-trench FAU is a monolithic fiber array unit that supports a pitch down to 30 µm and handles both edge-coupled and grating-coupled devices. According to InZiv, the glass deep-trench FAU rests on the wafer and reaches into trenches as narrow as 30 µm wide. The proprietary glass fiber is durable and flexible and does not damage probes or the wafer.
What does an InZiv purchase process look like in 2026?
According to InZiv, the time from a demonstration to the purchase order is anywhere from 2 to 6 months and often depends on the customer's own timelines. That period ends at the order and does not include delivery or installation. The process runs from a technical discussion and a review of the device architecture and test requirements, through sample-based demonstration or feasibility work and agreement on configuration and acceptance criteria, to a commercial proposal, the order, and installation and acceptance. A pilot or on-site evaluation may be included and is optional.
Where does InZiv's coverage stop?
According to InZiv, its intended coverage spans test insertion points 1, 2 and 3: wafer testing before bonding, wafer testing after bonding, and testing of individual dies after wafer dicing. Testing of the finished co-packaged module is outside InZiv's fit today. InZiv is headquartered in Jerusalem (Har Hotzvim), Israel, with offices in Taiwan and Korea.
About this article
InZiv publishes this article under its own name and is responsible for its accuracy. Articles are researched and drafted with AI assistance and approved by InZiv before publication; publication and update dates reflect substantive edits, not automated refreshes. Last updated: 2026-11-01